杭州地芯科技有限公司

GAD9694

GAD9694 is a quad, 14-bit, 500MSPS ADC. The chip has an on-chip buffer and a sample-and-hold circuit designed for low power, small size, and ease of use. It is designed for sampling wide bandwidth analog signals of up to 900MHz. Each pair of ADC data outputs is internally connected to two DDCs through a crossbar mux. Each DDC consists of up to five cascaded signal processing stages: a 48-bit frequency translator, NCO, and up to four half-band decimation filters. GAD9694 has flexible JESD204B lane configuration, the lane rate supports up to 10Gbps. This chip is suitable for radar system, software defined radios, wideband communications, test instrumentation, etc.